Diagnosis-Based Post-Silicon Timing Validation Using Statistical Tools and Methodologies

This paper describes a new post-silicon validation problem for diagnosing systematic timing errors. We illustrate the differences between timing validation and the traditional logic defect diagnosis. The key difference between our validation framework and other traditional diagnosis methods lies in our assumptions of the statistical circuit timing and statistical distribution of the size of timing errors. Different algorithms are proposed and evaluated via statistical timing error injection and simulation. Due to the statistical nature of the problem, 100% diagnosis resolution often cannot be guaranteed. With a statistical timing analysis framework developed in the past, we demonstrate the new concepts in timing validation, and discuss experimental results based upon three types of systematic errors: timing correlation error, crosstalk, and single-site random-size delay perturbation.